Contemporary BIMOS integrated processes enable I.C. manufacturers to integrate bipolar devices and MOS devices on the same I.C. chip. Accordingly, I.C. designers must provide circuitry to interface these differing technology devices since they customarily operate using different power supplies or voltage sources I.C. designers are often frustrated in providing suitable interfacing circuitry because some MOS circuitry may operate using a single-ended signal, while emitter-coupled logic (ECL) bipolar circuitry often operates using complementary or differential signals.
Additional circuitry maybe needed to level shift from MOS level to ECL level inputs and outputs. Avoiding this additional circuitry can reduce current drain as well as chip size.
One solution may be to operate all devices using complementary signals. However, such practice complicates the MOS portion of the I.C. and may result in increased chip size to accommodate the additional runners required to form differential MOS circuitry. Accordingly, a need exists to provide BIMOS logical circuit gates capable of providing ECL compatible complementary signals that do not unnecessarily complicate the design of the I.C. or unduly increase chip size.